Sequence checking means with plural gate and latch means



Dec. 21, 1965 G. M. BERKIN Filed Dec. 17, 1962 54 90/ 4e 52 ,m 72 OR /56 88%- LATCH LATCH LATCH INVENTOR GEORGE M. BERKIN BYQW AT TORNE Y United States Patent 3,225,205 SEQUENCE CHECKING MEANS WITH PLURAL GATE AND LATCH MEANS George M. Berkin, Endicott, N.Y., assignor to International Business Machines Corporation, New York,

N .Y., a corporation of New York Filed Dec. 17, 1962, Ser. No. 245,257 3 Claims. (Cl. 250-214) The present invention relates generally to checking and it has reference in particular to error checking means for use with a check endorser.

Generally stated, it is an object of the invention to check on the proper timed operation of a check endorser unit relative to movement of documents to be endorsed.

More specifically, it is an object of this invention to provide for initiating operation of a document endorser in timed relation with the arrival of a document to be endorsed, and for checking the operation of the endorser against the arrival of the document at and its departure from a predetermined check point.

It is also an object of this invention to provide for not only starting an endorser in predetermined timed relation with the passage of a document, but also for checking further to see that the endorser does in fact start from its rest position to perform its cycle of operation.

Another important object of this invention is to determine that after an endorser unit starts its cycle of operation, it returns to its original position before the arrival of the next document to be endorsed.

It is yet another object of the invention to provide for controlling the starting time of an endorser unit relative to the movement of a document so that an endorsement may be placed at different locations on the document.

Still another object of the invention is to insure in an endorser control circuit that a brake is activated for a sufiicient time to properly stop the unit.

In a preferred embodiment of the invention, checks are fed to an endorser having a rotatable sector which cycles to roll print a single endorsement on each check as it passes. Photocells sense both passage of the leading and the trailing edges of checks, and also movement of the print sector away from and towards its rest position, and produce a recurring normal sequence of signals. A check circuit includes latches, turned on and off by the first and second of said signals, and the second and fourth of said signals, respectively, and which cooperate with gates to produce error signals if a definite sequence is not maintained, in that the second signal occurs after the first and before the third, and the fourth signal occurs after the second, but before the cycle repeats.

The foregoing and other objects, features and advantages of the invention will be apparent from a more particular description of a preferred embodiment of the invention as illustrated in the accompanying drawing.

In the drawing, the single figure is a schematic diagram of an endorser checking circuit embodying the invention in one of its forms,

Referring to the drawing, the reference numeral designates generally an endorser checking circuit for a document handling machine (not shown) in which documents such as checks 12 are fed by means of feed rolls 11 from a hopper or stack 14 to an endorser unit 16 which roll prints an endorsement on the back of the check as it passes.

The endorser unit 16 may be of any suitable type comprising, for example, a sector or message plate 18 which is rotated by a shaft 20 driven by means of a motor M to engage a transfer inking roll 22 and imprint an endorsement on a check 12 as it passes between the sector 18 and a rubber platen 24.

The motor M may be operably connected to the shaft 20 through a suitable clutch 26, which may be of any Well known type, being for example of an electromagnetically operated type, An electrically operated brake 28 is provided for stopping the shaft 2t).

In order to provide for checking operation of the endorser 16 sensing means such as a solar cell or photocell PC4 may be located adjacent the path of the documents 12 so as to be subject to incident light from a source such as a light L1 'by way of a reflecting surface or mirror in the absence of a document 12. The presence of a document 12 reduces the incident light considerably. The photocell PC4 is connected to a control amplifier 36 to provide an output signal comprising for example a positive-going signal when the photocell PC4 is subjected to reduced light as soon as the leading edge of the document 12 is detected, and a negative-going signal when the trailing edge is detected and the full strength of the reflected light is restored. The output of the amplifier 36 is connected by means of capacitors 38 and 40 to amplifiers 42 and 44 which comprise respectively PNP and NPN and transistor circuits, so as to provide output signals on the leading and. trailing edges of the signal from the amplifier 36, respectively. The output of the amplifier 42 is connected to an AND circuit 46 where it is gated with an ON signal which may be produced or controlled by a suitable switch 45 used to turn the endorser unit ON. The output of the AND circuit 46 is applied to set a latch 51}, the output of which is gated in an AND circuit 52 with the trailing edge out put signal of the amplifier 44 for the purpose of controlling an error latch 56 to which it is connected by means of an OR circuit 54.

In order to detect the position of the sector 18 means such as a photocell PCS may be positioned so as to normally receive reflected light from a timing segments 30 from a source such as a lamp L2. In the normal position of the sector 18 the photocell PCS is positioned opposite a polished section 34 of the segment 30 so that the maximum amount of incident light falls upon it. When the sector 18 moves, a dark or non-reflecting portion 32 of the timing segment 30 moves into position so that a minimum of light is from source L2 reflected therefrom onto the photocell PCS. The photocell PCS is con nected to control an amplifier 60 similar to the amplifier 36, and the output of the amplifier 60 is likewise similarly connected by means of capacitors 62 and 64 to amplifier 66 and 68 which may be respectively of the PNP and NPN type so as to produce outputs individually responsive to sensing the leading and trailing edges of the light sector 34 of the timing segment 30. The output of the amplifier 66 is connected to reset the latch 50, while the output of the amplifier 68 is connected to reset a latch 70 which is set by the output from the amplifier 66. The output of the latch 70 is connected to an AND circuit 72 where it is gated with the output of the AND circuit 46 for controlling the error latch 56 through R circuit 54. A reset line 73 is connected to the latches 50, 76 and 56 for the purpose of resetting them to return the circuit to a normal condition.

The clutch 26 may be controlled by means of an output signal from the AND circuit 46 over line 74; which is connected to an adjustable delay circuit 76 and thence to the clutch 26 through a single shot 80, which provides a timed output pulse for operating the clutch. The delay circuit 76 is provided with a switch '78 for shunting the delay circuit and changing the effective delay time in order to provide for changing the starting time of the endorser and hence endorsing the checks 12 in a different position as the check passes by the sector 18.

The brake 28 is controlled by an output signal from the amplifier 68 over conductor 81 which is connected to operate a trigger 82 for applying an operating signal through OR circuit 84- to the brake 28. In order to guarantee the application of a predetermined minimum length of signal to the brake 28 for stopping the endorser, means such as a single shot 86 may be triggered by the signal over conductor 81 for applying a stop signal of a predetermined minimum duration to the brake 28 through OR 84 to guarantee a predetermined minimum duration of stop signal.

In operation the photocell PC4 detects the leading edge of a check 12 approaching the endorser 16 and amplifier 36 produces a positive-going signal which causes positive pulses to be applied to the amplifiers 42 and 44 through their respective capacitors 38 and 4-0. Amplifier 42 is turned off by the positive pulse signal applied to capacitor 38, and provides an output signal which gates with the ON signal which is applied at the terminal 88 of AND circuit 46. The output of the AND circuit 46 is applied to set latch 56 which provides an output signal to AND circuit 52. The output signal of the AND circuit 46 is also applied over conductor 74 to the delay circuit 76 and thence to the single shot 8t) monostable multivibrator for operating the clutch 26 to start the endorser sector 18 moving.

As soon as the sector 18 moves from its rest position, as shown, the leading edge of the reflecting segment 34 of the timing segment 30 causes a reduction in reflected light falling on the photocell PCS which causes the amplifier 60 to produce a positive-going output signal. This signal is applied to amplifiers 66 and 68 through capacitors 62 and 64, respectively. The signal applied to amplifier 66 turns the amplifier off momentarily and causes an output signal to be applied over conductor 90 to reset the latch 50.

When the photocell PC4 detects the trailing edge of the check 12, the output of the amplifier 36 falls, thus causing capacitors 38 and 40 to apply negative-going pulses to the amplifiers 42 and 4.4-. Amplifier 44 is turned off by the negative-going pulse, while amplifier 42 is unaffected. The turning oif of amplifier 44 produces an output signal which is applied to AND circuit 52 over conductor 100. Under a normal condition with the latch 50 reset, the application of an output pulse to the AND circuit 52 by the amplifier 44 produces no results. However, should the trailing edge of a check 12 be detected before the latch 50 is reset, this would result in applying the trailing edge signal over conductor 10!) to AND circuit 52 with the output of. the latch 50 thus producing an output from AND 52 to cause the error latch 56 to be operated and sound an alarm or shut down the machine, indicating an error condition.

When the leading edge signal was applied by the photocell PCS to the amplifier 6%), the output of the amplifier 66 besides being applied to reset latch '0, is also applied over conductor 102 to set the latch 70. The output of latch 70 is applied to an AND circuit 72, and should the leading edge of a subsequent check be detected, resulting in an output signal from the AND circuit 46 over conductor 74, before the trailing edge signal from amplifier 68 resets latch '70, these two signals would be gated in the AND circuit 72 and result in operation of the error latch 56 to indicate an error condition. Under normal conditions, however, the latch 70 is turned ON by the leading edge signal from photocell PCS and is turned OFF by the trailing edge signal from photocell PCS before the leading edge signal of the next document appears over line 74, so that the error latch 56 is normally not operated.

From the above description and the accompanying drawing, it will be apparent that the present invention provides a simple and effective means for checking the operation of an endorser unit. Not only is the endorser set in operation in predetermined timed relation to the arrival of documents at the endorser, but the movement of the sector of the endorser unit is checked against and with movement of the documents to and from the endorser unit so as to insure proper cycling thereof.

While the invention has been particularly shown and described with reference to a preferred embodiment thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

What is claimed is:

1. A sequence checking system comprising (a) means for producing a recurring sequence of a plurality of related signals,

(b) latch means activated by a first one of said signals and reset by a second one,

(o) gate means activated by concurrence of the latch activated condition and a third one of said signals,

(d) an additional latch activated by the second one of said signals and reset by the fourth of said signals, and

(e) additional gate means activated by concurrent activation of the additional latch and recurrence of the first of said signals.

2. In combination,

(a) means including a plurality of sensing devices for producing a plurality of signals normally related in a predetermined sequence,

(b) latch means connected to be set by a normal first one of said signals and reset by a second one,

(c) gate means activated by concurrence of activation of said latch means and a normal third one of said signals to indicate an error in sequence,

(d) additional latch means activated by the second one of the signals and reset by a fourth one of the signals, and

(e) additional gate means activated by concurrence of activation of said additional latch means and a fifth one of said signals.

3. In combination (a) means including a pair of photosensing devices for producing a normally recurring sequence of four signals,

(b) a first latch,

(c) circuit means applying the first of said signals to set said latch and produce a set output,

(d) other circuit means applying the second of said signals to reset said latch and provide a reset output,

(e) an AND circuit,

(f) means for applying the set output to said AND circuit,

(g) additional circuit means applying the third of said signals to said AND circuit,

(h) a second latch,

(i) yet other circuit means applying the second of said signals to set said second latch and provide a set output,

3,225,205 5 6 (j) still other circuit means applying the fourth of References Cited by the Examiner said signals to reset said second latch and provide UNITED STATES PATENTS a reset output,

additional AND circuit means, 2,994,783 8/1961 LOOSChCIl 250-209 X (1) further circuit means applying the set output of 5 3027830 4/1962 Yaeger 250*220 X slaieinzeggrd latch to the addrtlonal AND circuit WILLIAM B. PENN Primary Examiner.

(In) yet further circuit means applying the first signal EUGENE R. CAPOZIO, ROBERT E. PULFREY,

of a following sequence to said AND circuit. Examiners. 

1. A SEQUENCE CHECKING SYSTEM COMPRISING (A) MEANS FOR PRODUCING A RECURRING SEQUENCE OF A PLURALITY OF RELATED SIGNALS, (B) LATCH MEANS ACTIVATED BY A FIRST ONE OF SAID SIGNALS AND RESET BY A SECOND ONE, (C) GATE MEANS ACTIVATED BY CONCURRENCE OF THE LATCH ACTIVATED CONDITION AND A THIRD ONE OF SAID SIGNALS, (D) AN ADDITIONAL LATCH ACTIVATED BY THE SECOND ONE OF SAID SIGNALS AND RESET BY THE FOURTH OF SAID SIGNALS, AND (E) ADDITIONAL GATE MEANS ACTIVATED BY CONCURRENT ACTIVATION OF THE ADDITIONAL LATCH AND RECURRENCE OF THE FIRST OF SAID SIGNALS. 